GCSE · Computer Science · Edexcel · Spec 1CP2

Registers

Tucked inside the CPU are a few tiny, very fast stores called registers. Follow one instruction through them and you have the whole fetch-decode-execute cycle.

Computer Science · Inside the CPU

Follow one instruction through the registers

The PC holds 20. Memory address 20 holds the instruction LOAD 51 (‘copy the value stored at address 51 into the accumulator’), and address 51 holds the value 9. Step through one whole fetch-decode-execute cycle.

Press Next › one step at a time. Before each step, predict which box will change — and whether its new value is an address, an instruction or data.

Phase: Fetch

MAR

—

Address bus

—

Data bus

—

MDR

—

CIR

—

Accumulator

—

Output

Start: PC = 20 (an address)

Step 1: Everything starts at the program counter. It holds 20. That isn't an instruction — it's the ADDRESS in memory where the next instruction is waiting.

1 / 10

A dash (—) means empty so far — or, on a bus, that nothing is travelling at this step. Addresses are shown in denary and the instruction in words to keep them readable; the CPU itself holds them as binary. The log above builds up every move you've seen.

Step 1 of 10: Everything starts at the program counter. It holds 20. That isn't an instruction — it's the ADDRESS in memory where the next instruction is waiting..

Computer Science · Structure

Zoom out: where the registers live

Tap each box to see its job. The registers sit inside the CPU with the control unit, the ALU and the clock. Main memory is outside, joined by the address bus and the data bus.

Tap any part of the diagram to see what it does.

Name that register

Tap a description, then tap the register that holds it. Ask yourself first: is it an address, an instruction or data?

Still to sort

PC — program counter (0)

Holds an address.

Where the line is: PC: the address of the NEXT instruction. MAR: the address being accessed right now, whether that's an instruction's or some data's.

MAR — memory address register (0)

Holds an address.

Where the line is: MAR: where to look. MDR: what was found there.

MDR — memory data register (0)

Holds whatever has just been fetched.

Where the line is: MDR: whatever has just arrived, instruction or data. CIR: an instruction, and nothing else.

CIR — current instruction register (0)

Holds an instruction.

Where the line is: CIR: the instruction itself. PC: just the address of the next one.

Accumulator (0)

Holds data.

Where the line is: Accumulator: data for a calculation, or its result. MDR: data that has only just arrived.

8 of 8 still to sort.

Five registers, eight descriptions. Commit to an answer before you read why.

What does the PC actually hold?

A CPU is about to start a new cycle. Its PC holds 42, and the instruction LOAD 88 is stored at memory address 42.

Pick the idea closest to what you think right now, choose how sure you are, then check.

The PC holds 42 — the address of LOAD 88. The instruction itself will arrive in the MDR and then be copied to the CIR.The PC holds LOAD 88 — the next instruction, ready to be decoded.The MDR only holds data, so LOAD 88 must go straight into the CIR.The PC stays at 42 until LOAD 88 has been executed, then goes up to 43.

How sure are you?

I'm sureI think soI'm guessing

The PC holds 42 — the address of LOAD 88. The instruction itself will arrive in the MDR and then be copied to the CIR.

This matches the evidence

Exactly right. The PC is a pointer: it says WHERE the next instruction is, not WHAT it is. LOAD 88 only enters the CPU once address 42 has gone out via the MAR and memory has replied along the data bus into the MDR.

The PC holds LOAD 88 — the next instruction, ready to be decoded.

This is a common misconception

This is the classic slip. The PC holds an ADDRESS — here, 42. If the PC already held the instruction, the CPU wouldn't need to fetch it from memory at all. The instruction arrives in the MDR, is copied to the CIR, and is decoded from there.

The MDR only holds data, so LOAD 88 must go straight into the CIR.

This is a common misconception

The MDR holds whatever has just been fetched from memory: an instruction during the fetch, data during a load's execute stage. LOAD 88 lands in the MDR first, and only then is copied to the CIR.

The PC stays at 42 until LOAD 88 has been executed, then goes up to 43.

This is a common misconception

The PC is increased by one as part of the fetch, when the instruction is copied into the CIR. So it already holds 43 while LOAD 88 is being decoded and executed — which is how it's ready for the next fetch the moment this cycle ends.

The PC points; it doesn't carry. It holds the ADDRESS of the next instruction, and it moves on to the next address during the fetch.

Now tell the story yourself

Describe how the registers are used during one fetch-decode-execute cycle for an instruction that loads a value from memory into the accumulator. [6 marks]

Your answer

0 words · your answer stays on this page and is not sent anywhere.

The mark scheme

The address in the PC is copied into the MAR. (1 mark)
The address in the MAR is sent to main memory along the address bus. (1 mark)
The instruction at that address is sent back along the data bus into the MDR. (1 mark)
The instruction is copied from the MDR into the CIR. (1 mark)
The PC is increased by one, so it points to the next instruction. (1 mark)
The control unit decodes the instruction held in the CIR. (1 mark)
To execute the load, the MAR is updated with the address of the data, and the data comes back along the data bus into the MDR. (1 mark)
The data is copied from the MDR into the accumulator. (1 mark)

Model answer

First the address held in the program counter is copied into the memory address register, which sends it to main memory on the address bus. Memory puts the instruction stored there on the data bus, and it arrives in the memory data register. From there it is copied into the current instruction register, and the program counter goes up by one so it holds the address of the following instruction. The control unit then decodes the instruction in the CIR. Because it is a load, the MAR is given the address of the data, the data travels back on the data bus into the MDR, and finally it is stored in the accumulator.

Any six of these eight moves earn full marks. Check that you named the right bus each time — the address bus takes addresses out, the data bus brings instructions and data back — and that you didn't forget the PC moving on.

WHAT YOU'VE LEARNED

A quick recap of today's lesson.

Five small stores, one question each: is this an address, an instruction or data?

What you need to know

Registers are very small, very fast memory locations inside the CPU, and each type of register has its own job.
Each register holds one kind of value: the PC and MAR hold addresses, the CIR holds an instruction, the accumulator holds data — and the MDR holds whatever has just arrived from memory.
The address bus takes an address from the MAR to main memory; the data bus brings the instruction or data back into the MDR.
Fetch runs PC → MAR → memory → MDR → CIR, with the PC increased by one; the control unit then decodes the instruction in the CIR.

The big picture

Registers are very small, very fast memory locations inside the CPU, and each type has its own job. The program counter (PC) holds the address of the next instruction to fetch. The memory address register (MAR) holds the address about to be accessed in main memory. The memory data register (MDR) holds whatever has just been fetched, instruction or data. The current instruction register (CIR) holds the instruction being decoded and executed. The accumulator holds data used in calculations and their results. In each fetch-decode-execute cycle, values pass between these registers and main memory along the address bus and the data bus.

Key points

1PC (program counter): holds the memory address of the next instruction to fetch, and is increased by one after each fetch.

2MAR (memory address register): holds the address to be accessed in main memory (RAM), and sends it along the address bus.

3MDR (memory data register): temporarily holds the instruction or data just fetched from memory along the data bus.

4CIR (current instruction register): holds the binary instruction to be executed; only instructions, not data, are copied into it from the MDR.

5Accumulator: holds data being used in calculations and their results, including data loaded from memory.

6For a load, the execute stage updates the MAR with the data's address, and the data that arrives in the MDR is stored in the accumulator.

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Worked example

Problem

A CPU's program counter holds 34. Memory address 34 holds the instruction LOAD 70, and memory address 70 holds the value 15. When this instruction has been fetched, decoded and executed, what will the PC, CIR, MAR, MDR and accumulator hold?

⚠ Watch out

Mixing up the MAR and the MDR. The MAR holds an ADDRESS — where in memory to look. The MDR holds what was FOUND there — the instruction or data that came back. A for Address; D for the data (or instruction) that comes back.

🧠

Memory hook

Ask every register one question: ‘Address, instruction or data?’ The PC and MAR answer ADDRESS. The CIR answers INSTRUCTION. The accumulator answers DATA. And the MDR is the doorway — it takes whatever comes through.

✓

Check yourself

Mid-fetch, the MDR has just received LOAD 63 and the PC still holds 17. What happens next to each? (Answer: LOAD 63 is copied into the CIR, and the PC becomes 18.)

Flashcards

(12)

What is a register?

A very small, very fast memory location inside the CPU. There are different types, each with its own job.

Registers are one key component inside the CPU. Name the others.

The control unit, the arithmetic logic unit (ALU), the buses and the clock.

What does the PC hold — and what happens to it after each fetch?

The memory address of the next instruction to fetch. After each fetch it is increased by one, so it points to the next instruction in sequence.

What does the MAR hold, and which bus does it use?

The memory address to be accessed in main memory (RAM). That address is sent to memory along the address bus.

What does the MDR hold?

Temporarily, the instruction or data that has just been fetched from memory and sent back along the data bus.

What does the CIR hold, and what happens to it?

The binary representation of the instruction to be executed. The control unit takes the instruction from the CIR to decode it.

What does the accumulator hold?

Data being used in calculations and the results of calculations. Data loaded from memory is stored here.

Which bus carries an address to memory, and which brings things back?

The address bus carries the MAR's address to memory. The data bus brings the instruction or data back to the MDR.

An instruction arrives from memory. Which register does it enter first, and where does it go next?

It enters the MDR first, then it is copied into the CIR.

During the execute stage of a load, what happens to the MAR, the MDR and the accumulator?

The MAR is updated with the address of the data; the data returns along the data bus into the MDR; then it is stored in the accumulator.

Two registers hold addresses. Which two, and what's the difference?

The PC holds the address of the NEXT instruction. The MAR holds the address being accessed right now — for an instruction or for data.

Is data loaded from memory ever copied into the CIR?

No. Only a fetched instruction is copied from the MDR into the CIR; loaded data goes on to the accumulator.

Tap any card to flip it, or use Study as deck to go through them one at a time. In the full lesson these run as a spaced-repetition deck — you rate each card Hard, Good or Easy and the tricky ones keep coming back until they stick.

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Follow one instruction through the registers

Zoom out: where the registers live

Name that register

What does the PC actually hold?

Now tell the story yourself

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